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(parent: 44175d9) | patch
[PowerPC] Make specialized AltiVec patterns isCodeGenOnly
authorUlrich Weigand <ulrich.weigand@de.ibm.com>
Wed, 3 Jul 2013 12:51:09 +0000 (12:51 +0000)
committerUlrich Weigand <ulrich.weigand@de.ibm.com>
Wed, 3 Jul 2013 12:51:09 +0000 (12:51 +0000)
commitbf8eb3d55cc0fe37d0ef140c2492214083a48dcb
treefa10790efc7362bb0d4bd7b3adcb902f9ffd25c9tree | snapshot
parent44175d9715268bfb7c2cb10ebf14474f4a411464commit | diff
[PowerPC] Make specialized AltiVec patterns isCodeGenOnly

A couple of AltiVec patterns are just specialized forms of the
generic instruction pattern, and should therefore be marked
isCodeGenOnly to avoid confusing the asm parser:
VCFSX_0, VCTUXS_0, VCFUX_0, VCTSXS_0, and V_SETALLONES.

Noticed by inspection of the generated PPCGenAsmMatcher.inc.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185533 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/PowerPC/PPCInstrAltivec.td diff | blob | history
C/C++ LLVM-based compilers that forbids OOTA behaviors