Adding an A15 specific optimization pass for interactions between S/D/Q registers...
authorSilviu Baranga <silviu.baranga@arm.com>
Fri, 15 Mar 2013 18:28:25 +0000 (18:28 +0000)
committerSilviu Baranga <silviu.baranga@arm.com>
Fri, 15 Mar 2013 18:28:25 +0000 (18:28 +0000)
commitbcbf3fddef46f1f6e2f2408064c4b75e4b6c90f5
tree659e38348e38eed0a949be8fce08e3e9e8e9951a
parent133c0d36e1fdeda88d784017bafa8a1b22af8aca
Adding an A15 specific optimization pass for interactions between S/D/Q registers. The pass handles all the required transformations pre-regalloc.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177169 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/ARM/A15SDOptimizer.cpp [new file with mode: 0644]
lib/Target/ARM/ARM.h
lib/Target/ARM/ARMBaseInstrInfo.cpp
lib/Target/ARM/ARMTargetMachine.cpp
lib/Target/ARM/CMakeLists.txt
test/CodeGen/ARM/a15-SD-dep.ll [new file with mode: 0644]