Fix PR15155: lost vadd/vsplat optimization.
authorBill Schmidt <wschmidt@linux.vnet.ibm.com>
Wed, 20 Feb 2013 15:50:31 +0000 (15:50 +0000)
committerBill Schmidt <wschmidt@linux.vnet.ibm.com>
Wed, 20 Feb 2013 15:50:31 +0000 (15:50 +0000)
commitb34c79e4bbe5accbb54d0291e8bef5d2bfef32e4
treeb1fd629ad95c3cf90e10d668e4d94897d89bfbc5
parent94e9d0d491f76aaab13f8bc7764ad73de11fa2bf
Fix PR15155: lost vadd/vsplat optimization.

During lowering of a BUILD_VECTOR, we look for opportunities to use a
vector splat.  When the splatted value fits in 5 signed bits, a single
splat does the job.  When it doesn't fit in 5 bits but does fit in 6,
and is an even value, we can splat on half the value and add the result
to itself.

This last optimization hasn't been working recently because of improved
constant folding.  To circumvent this, create a pseudo VADD_SPLAT that
can be expanded during instruction selection.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175632 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/PowerPC/PPCISelDAGToDAG.cpp
lib/Target/PowerPC/PPCISelLowering.cpp
lib/Target/PowerPC/PPCISelLowering.h
test/CodeGen/PowerPC/vaddsplat.ll [new file with mode: 0644]