[AArch64]Merge halfword loads into a 32-bit load
authorJun Bum Lim <junbuml@codeaurora.org>
Tue, 27 Oct 2015 19:16:03 +0000 (19:16 +0000)
committerJun Bum Lim <junbuml@codeaurora.org>
Tue, 27 Oct 2015 19:16:03 +0000 (19:16 +0000)
commitb0bca8e16803360f0124f46d7bd5f6d258663883
treedaddf9273d425054b5d591f75a4cf3fb2add0f30
parentc287d4cc994b8f20905449213efb62b865c0bba5
[AArch64]Merge halfword loads into a 32-bit load

This recommits r250719, which caused a failure in SPEC2000.gcc
because of the incorrect insert point for the new wider load.

Convert two halfword loads into a single 32-bit word load with bitfield extract
instructions. For example :
  ldrh w0, [x2]
  ldrh w1, [x2, #2]
becomes
  ldr w0, [x2]
  ubfx w1, w0, #16, #16
  and  w0, w0, #ffff

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@251438 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp
test/CodeGen/AArch64/arm64-ldp.ll