Order register classes by spill size first, members last.
authorJakob Stoklund Olesen <stoklund@2pi.dk>
Fri, 4 May 2012 23:12:22 +0000 (23:12 +0000)
committerJakob Stoklund Olesen <stoklund@2pi.dk>
Fri, 4 May 2012 23:12:22 +0000 (23:12 +0000)
commita93090ccd914492550ee43befe1f0c2286b22fed
treea0b8d9e585e6721e02783153306bd1bec07ccb00
parent7fc4d9cbc54c2e5393440a40b566c1f0527d8037
Order register classes by spill size first, members last.

This is still a topological ordering such that every register class gets
a smaller enum value than its sub-classes.

Placing the smaller spill sizes first makes a difference for the
super-register class bit masks. When looking for a super-register class,
we usually want the smallest possible kind of super-register. That is
now available as the first bit set in the bit mask.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@156222 91177308-0d34-0410-b5e6-96231b3b80d8
utils/TableGen/CodeGenRegisters.cpp