Fix PR10475
authorMichael Liao <michael.liao@intel.com>
Fri, 1 Mar 2013 18:40:30 +0000 (18:40 +0000)
committerMichael Liao <michael.liao@intel.com>
Fri, 1 Mar 2013 18:40:30 +0000 (18:40 +0000)
commita6b20ced765b67a85d9219d0c8547fc9c133e14f
treef3a6b8ebc9b5844b4eebe89f46f9dc3ba451b790
parentb8f307b2d6b5fb1380803ff91696902bebbef7c6
Fix PR10475

- ISD::SHL/SRL/SRA must have either both scalar or both vector operands
  but TLI.getShiftAmountTy() so far only return scalar type. As a
  result, backend logic assuming that breaks.
- Rename the original TLI.getShiftAmountTy() to
  TLI.getScalarShiftAmountTy() and re-define TLI.getShiftAmountTy() to
  return target-specificed scalar type or the same vector type as the
  1st operand.
- Fix most TICG logic assuming TLI.getShiftAmountTy() a simple scalar
  type.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@176364 91177308-0d34-0410-b5e6-96231b3b80d8
14 files changed:
include/llvm/CodeGen/ISDOpcodes.h
include/llvm/Target/TargetLowering.h
lib/CodeGen/SelectionDAG/LegalizeIntegerTypes.cpp
lib/CodeGen/SelectionDAG/SelectionDAG.cpp
lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
lib/CodeGen/TargetLoweringBase.cpp
lib/Target/MSP430/MSP430ISelLowering.h
lib/Target/Mips/MipsISelLowering.h
lib/Target/NVPTX/NVPTXISelLowering.h
lib/Target/PowerPC/PPCISelLowering.h
lib/Target/X86/X86ISelLowering.cpp
lib/Target/X86/X86ISelLowering.h
lib/Target/XCore/XCoreISelLowering.h
test/CodeGen/X86/pr10475.ll [new file with mode: 0644]