[ARM] Fast-Isel was incorrectly selecting <2 x double> adds.
authorPete Cooper <peter_cooper@apple.com>
Wed, 6 May 2015 16:39:17 +0000 (16:39 +0000)
committerPete Cooper <peter_cooper@apple.com>
Wed, 6 May 2015 16:39:17 +0000 (16:39 +0000)
commit99413f0d403eaaf0be6ab875a6f638a6067fd97f
treef99d658cf1eba363a26fce6fe82c09cac51cc8f9
parent982f60be4432d66d819b6018ebbdb19379f29e72
[ARM] Fast-Isel was incorrectly selecting <2 x double> adds.

With neon enabled, we reach SelectBinaryFPOp and are able to get registers for a <2 x double> add.

However, we shouldn't actually attempt arithmetic on it as ARMIselLowering says "v2f64 is legal so that QR subregs can be extracted as f64 elements, but neither Neon nor VFP support any arithmetic operations on it."

This commit disables SelectBinaryFPOp for any vector types.  There's already a FIXME to try handle neon.  Doing so would require fixing this conditional which isn't safe for vectors 'VT == MVT::f64 || VT == MVT::i64'

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236609 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/ARM/ARMFastISel.cpp
test/CodeGen/ARM/fast-isel-vaddd.ll [new file with mode: 0644]