Optimize zext on PPC64.
authorHal Finkel <hfinkel@anl.gov>
Tue, 28 Aug 2012 02:10:15 +0000 (02:10 +0000)
committerHal Finkel <hfinkel@anl.gov>
Tue, 28 Aug 2012 02:10:15 +0000 (02:10 +0000)
commit97d047dec71cb37f31aac102cdc87b3dec0b1c46
treeff8cb03e42fb2b48aaec96dff4633dbf36bd5b0c
parent164a308b563c8bdc280c0762d79a8e797c3497e7
Optimize zext on PPC64.

The zeroextend IR instruction is lowered to an 'and' node with an immediate
mask operand, which in turn gets legalised to a sequence of ori's & ands.
This can be done more efficiently using the rldicl instruction.

Patch by Tobias von Koch.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@162724 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/PowerPC/PPCISelDAGToDAG.cpp
test/CodeGen/PowerPC/ppc64-zext.ll [new file with mode: 0644]