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(parent: 91d2cc9) | patch
Add X86 TZCNT instruction and patterns to select it. Also added core-avx2 processor...
authorCraig Topper <craig.topper@gmail.com>
Fri, 14 Oct 2011 03:21:46 +0000 (03:21 +0000)
committerCraig Topper <craig.topper@gmail.com>
Fri, 14 Oct 2011 03:21:46 +0000 (03:21 +0000)
commit909652f6876a97d63db20606cd1b37e95d016caf
treea0a7eb7f62431538b9fbfbadb4c6b500dbd3ef96tree | snapshot
parent91d2cc9cdd5f5c5fa89b4efa75217c96cbd38356commit | diff
Add X86 TZCNT instruction and patterns to select it. Also added core-avx2 processor which is gcc's name for Haswell.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141939 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/X86/X86.td diff | blob | history
lib/Target/X86/X86ISelLowering.cpp diff | blob | history
lib/Target/X86/X86InstrInfo.td diff | blob | history
lib/Target/X86/X86Subtarget.cpp diff | blob | history
lib/Target/X86/X86Subtarget.h diff | blob | history
test/CodeGen/X86/bmi.ll [new file with mode: 0644] blob
test/MC/Disassembler/X86/simple-tests.txt diff | blob | history
test/MC/Disassembler/X86/x86-32.txt diff | blob | history
C/C++ LLVM-based compilers that forbids OOTA behaviors