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(parent: 3791d56) | patch
[DAGCombiner] Preserve the exact bit when simplifying SRA to SRL.
authorBenjamin Kramer <benny.kra@googlemail.com>
Fri, 26 Jun 2015 14:51:49 +0000 (14:51 +0000)
committerBenjamin Kramer <benny.kra@googlemail.com>
Fri, 26 Jun 2015 14:51:49 +0000 (14:51 +0000)
commit875007d3c44ea7c392d2526be2683574bbcb6af4
tree1f3d1461638f49dd1165bfb24804306b135abae3tree | snapshot
parent3791d56da63baf5072fa6ecaa872ace6adbc6892commit | diff
[DAGCombiner] Preserve the exact bit when simplifying SRA to SRL.

Allows more aggressive folding of ashr/shl pairs.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240788 91177308-0d34-0410-b5e6-96231b3b80d8
lib/CodeGen/SelectionDAG/TargetLowering.cpp diff | blob | history
test/CodeGen/X86/shift-combine.ll diff | blob | history
C/C++ LLVM-based compilers that forbids OOTA behaviors