[ARM][NEON] Use address space in vld([1234]|[234]lane) and vst([1234]|[234]lane)...
authorJeroen Ketema <j.ketema@imperial.ac.uk>
Wed, 30 Sep 2015 10:56:37 +0000 (10:56 +0000)
committerJeroen Ketema <j.ketema@imperial.ac.uk>
Wed, 30 Sep 2015 10:56:37 +0000 (10:56 +0000)
commit874371d11b1a72ac57929c43319b795a560efbeb
tree160ddf0c3daeb9365e4329b408b602f15c540840
parent0d59ae63696d395bc70d88cc2d827307dd558640
[ARM][NEON] Use address space in vld([1234]|[234]lane) and vst([1234]|[234]lane) instructions

This commit changes the interface of the vld[1234], vld[234]lane, and vst[1234],
vst[234]lane ARM neon intrinsics and associates an address space with the
pointer that these intrinsics take. This changes, e.g.,

<2 x i32> @llvm.arm.neon.vld1.v2i32(i8*, i32)

to

<2 x i32> @llvm.arm.neon.vld1.v2i32.p0i8(i8*, i32)

This change ensures that address spaces are fully taken into account in the ARM
target during lowering of interleaved loads and stores.

Differential Revision: http://reviews.llvm.org/D12985

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@248887 91177308-0d34-0410-b5e6-96231b3b80d8
45 files changed:
include/llvm/IR/IntrinsicsARM.td
lib/IR/AutoUpgrade.cpp
lib/Target/ARM/ARMISelLowering.cpp
test/Analysis/BasicAA/cs-cs.ll
test/Analysis/BasicAA/intrinsics.ll
test/Analysis/TypeBasedAliasAnalysis/intrinsics.ll
test/CodeGen/ARM/2010-05-20-NEONSpillCrash.ll
test/CodeGen/ARM/2010-05-21-BuildVector.ll
test/CodeGen/ARM/2010-06-11-vmovdrr-bitcast.ll
test/CodeGen/ARM/2010-06-29-PartialRedefFastAlloc.ll
test/CodeGen/ARM/2011-08-12-vmovqqqq-pseudo.ll
test/CodeGen/ARM/2012-01-24-RegSequenceLiveRange.ll
test/CodeGen/ARM/2012-05-10-PreferVMOVtoVDUP32.ll
test/CodeGen/ARM/2012-08-27-CopyPhysRegCrash.ll
test/CodeGen/ARM/2013-10-11-select-stalls.ll
test/CodeGen/ARM/2014-01-09-pseudo_expand_implicit_reg.ll
test/CodeGen/ARM/arm-interleaved-accesses.ll
test/CodeGen/ARM/coalesce-subregs.ll
test/CodeGen/ARM/dagcombine-concatvector.ll
test/CodeGen/ARM/neon_spill.ll
test/CodeGen/ARM/out-of-registers.ll
test/CodeGen/ARM/reg_sequence.ll
test/CodeGen/ARM/spill-q.ll
test/CodeGen/ARM/vcge.ll
test/CodeGen/ARM/vector-DAGCombine.ll
test/CodeGen/ARM/vld-vst-upgrade.ll [new file with mode: 0644]
test/CodeGen/ARM/vld1.ll
test/CodeGen/ARM/vld2.ll
test/CodeGen/ARM/vld3.ll
test/CodeGen/ARM/vld4.ll
test/CodeGen/ARM/vlddup.ll
test/CodeGen/ARM/vldlane.ll
test/CodeGen/ARM/vmov.ll
test/CodeGen/ARM/vmul.ll
test/CodeGen/ARM/vst1.ll
test/CodeGen/ARM/vst2.ll
test/CodeGen/ARM/vst3.ll
test/CodeGen/ARM/vst4.ll
test/CodeGen/ARM/vstlane.ll
test/CodeGen/Thumb2/crash.ll
test/CodeGen/Thumb2/machine-licm.ll
test/CodeGen/Thumb2/thumb2-spill-q.ll
test/CodeGen/Thumb2/v8_IT_1.ll
test/Transforms/InstCombine/neon-intrinsics.ll
test/Transforms/LoopStrengthReduce/ARM/ivchain-ARM.ll