Rename SSARegMap -> MachineRegisterInfo in keeping with the idea
authorChris Lattner <sabre@nondot.org>
Mon, 31 Dec 2007 04:13:23 +0000 (04:13 +0000)
committerChris Lattner <sabre@nondot.org>
Mon, 31 Dec 2007 04:13:23 +0000 (04:13 +0000)
commit84bc5427d6883f73cfeae3da640acd011d35c006
tree5686c82a5bfacdb56c5e7dabbf24990d70aac8d3
parent8164a33856f35763bd6f0956dd74a26ef19e11b0
Rename SSARegMap -> MachineRegisterInfo in keeping with the idea
that "machine" classes are used to represent the current state of
the code being compiled.  Given this expanded name, we can start
moving other stuff into it.  For now, move the UsedPhysRegs and
LiveIn/LoveOuts vectors from MachineFunction into it.

Update all the clients to match.

This also reduces some needless #includes, such as MachineModuleInfo
from MachineFunction.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@45467 91177308-0d34-0410-b5e6-96231b3b80d8
53 files changed:
include/llvm/CodeGen/AsmPrinter.h
include/llvm/CodeGen/LiveIntervalAnalysis.h
include/llvm/CodeGen/MachineFunction.h
include/llvm/CodeGen/MachineRegisterInfo.h [new file with mode: 0644]
include/llvm/CodeGen/SSARegMap.h [deleted file]
include/llvm/CodeGen/ScheduleDAG.h
include/llvm/CodeGen/SelectionDAGISel.h
include/llvm/Target/MRegisterInfo.h
lib/CodeGen/AsmPrinter.cpp
lib/CodeGen/Collector.cpp
lib/CodeGen/LiveIntervalAnalysis.cpp
lib/CodeGen/LiveVariables.cpp
lib/CodeGen/LowerSubregs.cpp
lib/CodeGen/MachineFunction.cpp
lib/CodeGen/MachineInstr.cpp
lib/CodeGen/MachineRegisterInfo.cpp [new file with mode: 0644]
lib/CodeGen/PHIElimination.cpp
lib/CodeGen/PrologEpilogInserter.cpp
lib/CodeGen/RegAllocBigBlock.cpp
lib/CodeGen/RegAllocLinearScan.cpp
lib/CodeGen/RegAllocLocal.cpp
lib/CodeGen/RegAllocSimple.cpp
lib/CodeGen/SelectionDAG/LegalizeDAG.cpp
lib/CodeGen/SelectionDAG/ScheduleDAG.cpp
lib/CodeGen/SelectionDAG/ScheduleDAGList.cpp
lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp
lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
lib/CodeGen/SimpleRegisterCoalescing.cpp
lib/CodeGen/StrongPHIElimination.cpp
lib/CodeGen/TwoAddressInstructionPass.cpp
lib/CodeGen/VirtRegMap.cpp
lib/Target/ARM/ARMISelDAGToDAG.cpp
lib/Target/ARM/ARMISelLowering.cpp
lib/Target/ARM/ARMRegisterInfo.cpp
lib/Target/Alpha/AlphaISelDAGToDAG.cpp
lib/Target/Alpha/AlphaISelLowering.cpp
lib/Target/CellSPU/SPUISelDAGToDAG.cpp
lib/Target/CellSPU/SPUISelLowering.cpp
lib/Target/CellSPU/SPURegisterInfo.cpp
lib/Target/IA64/IA64ISelDAGToDAG.cpp
lib/Target/IA64/IA64ISelLowering.cpp
lib/Target/IA64/IA64RegisterInfo.cpp
lib/Target/Mips/MipsISelDAGToDAG.cpp
lib/Target/Mips/MipsISelLowering.cpp
lib/Target/PowerPC/PPCISelDAGToDAG.cpp
lib/Target/PowerPC/PPCISelLowering.cpp
lib/Target/PowerPC/PPCRegisterInfo.cpp
lib/Target/Sparc/SparcISelDAGToDAG.cpp
lib/Target/X86/X86FloatingPoint.cpp
lib/Target/X86/X86ISelDAGToDAG.cpp
lib/Target/X86/X86ISelLowering.cpp
lib/Target/X86/X86InstrInfo.cpp
lib/Target/X86/X86RegisterInfo.cpp