[MC layer][AArch64] llvm-mc accepts 4-bit immediate values for
authorAlexandros Lamprineas <alexandros.lamprineas@arm.com>
Mon, 5 Oct 2015 13:42:31 +0000 (13:42 +0000)
committerAlexandros Lamprineas <alexandros.lamprineas@arm.com>
Mon, 5 Oct 2015 13:42:31 +0000 (13:42 +0000)
commit82e78e2e9da77fb00f10ac3d1121e27a80f478a4
tree45eb9d02b602270b1c3db7912c9c7ca0c39289a1
parentfbdf2017eab1c9c16faaf80dc31df83820dec2ab
[MC layer][AArch64] llvm-mc accepts 4-bit immediate values for
"msr pan, #imm", while only 1-bit immediate values should be valid.
Changed encoding and decoding for msr pstate instructions.

Differential Revision: http://reviews.llvm.org/D13011

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@249313 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/AArch64/AArch64ISelDAGToDAG.cpp
lib/Target/AArch64/AArch64InstrFormats.td
lib/Target/AArch64/AArch64InstrInfo.td
lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp
test/MC/AArch64/armv8.1a-pan.s
test/MC/Disassembler/AArch64/armv8.1a-pan.txt