[mips] Add COP0 register class and use it in M[FT]C0/DM[FT]C0.
authorDaniel Sanders <daniel.sanders@imgtec.com>
Sat, 27 Jun 2015 15:39:19 +0000 (15:39 +0000)
committerDaniel Sanders <daniel.sanders@imgtec.com>
Sat, 27 Jun 2015 15:39:19 +0000 (15:39 +0000)
commit817cbdeae602d97bb8e8c45d9eaa34a9d6f2e6cf
tree12ec47de00cc4cdff880a020b9cb200d88130705
parentb9fec3eb617427a77d2b73fd962e90bb4b5d734f
[mips] Add COP0 register class and use it in M[FT]C0/DM[FT]C0.

Summary:
Previously it (incorrectly) used GPR's.

Patch by Simon Dardis. A couple small corrections by myself.

Reviewers: dsanders

Reviewed By: dsanders

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D10567

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240883 91177308-0d34-0410-b5e6-96231b3b80d8
44 files changed:
lib/Target/Mips/AsmParser/MipsAsmParser.cpp
lib/Target/Mips/Disassembler/MipsDisassembler.cpp
lib/Target/Mips/MCTargetDesc/MipsOptionRecord.cpp
lib/Target/Mips/Mips64InstrInfo.td
lib/Target/Mips/MipsInstrInfo.td
lib/Target/Mips/MipsOptionRecord.h
lib/Target/Mips/MipsRegisterInfo.td
test/MC/Disassembler/Mips/mips32.txt
test/MC/Disassembler/Mips/mips32/valid-mips32-el.txt
test/MC/Disassembler/Mips/mips32/valid-mips32.txt
test/MC/Disassembler/Mips/mips32_le.txt
test/MC/Disassembler/Mips/mips32r2.txt
test/MC/Disassembler/Mips/mips32r2/valid-mips32r2-le.txt
test/MC/Disassembler/Mips/mips32r2/valid-mips32r2.txt
test/MC/Disassembler/Mips/mips32r2_le.txt
test/MC/Disassembler/Mips/mips32r3/valid-mips32r3-le.txt
test/MC/Disassembler/Mips/mips32r3/valid-mips32r3.txt
test/MC/Disassembler/Mips/mips32r5/valid-mips32r5-le.txt
test/MC/Disassembler/Mips/mips32r5/valid-mips32r5.txt
test/MC/Disassembler/Mips/mips32r6.txt
test/MC/Disassembler/Mips/mips32r6/valid-mips32r6-el.txt
test/MC/Disassembler/Mips/mips32r6/valid-mips32r6.txt
test/MC/Disassembler/Mips/mips64.txt
test/MC/Disassembler/Mips/mips64/valid-mips64-el.txt
test/MC/Disassembler/Mips/mips64/valid-mips64.txt
test/MC/Disassembler/Mips/mips64r2/valid-mips64r2-el.txt
test/MC/Disassembler/Mips/mips64r2/valid-mips64r2.txt
test/MC/Disassembler/Mips/mips64r3/valid-mips64r3-el.txt
test/MC/Disassembler/Mips/mips64r3/valid-mips64r3.txt
test/MC/Disassembler/Mips/mips64r5/valid-mips64r5-el.txt
test/MC/Disassembler/Mips/mips64r5/valid-mips64r5.txt
test/MC/Disassembler/Mips/mips64r6/valid-mips64r6-el.txt
test/MC/Disassembler/Mips/mips64r6/valid-mips64r6.txt
test/MC/Mips/mips-cop0-reginfo.s [new file with mode: 0644]
test/MC/Mips/mips32/valid.s
test/MC/Mips/mips32r2/valid.s
test/MC/Mips/mips32r3/valid.s
test/MC/Mips/mips32r5/valid.s
test/MC/Mips/mips32r6/valid.s
test/MC/Mips/mips64/valid.s
test/MC/Mips/mips64r2/valid.s
test/MC/Mips/mips64r3/valid.s
test/MC/Mips/mips64r5/valid.s
test/MC/Mips/mips64r6/valid.s