Allow PPC B and BLR to be if-converted into some predicated forms
authorHal Finkel <hfinkel@anl.gov>
Tue, 9 Apr 2013 22:58:37 +0000 (22:58 +0000)
committerHal Finkel <hfinkel@anl.gov>
Tue, 9 Apr 2013 22:58:37 +0000 (22:58 +0000)
commit7eb0d8148e1210d9e31ab471477de47b53bab117
tree59cbf016ac5c78bc44d43e66bc48073584217500
parent58ddf528927a57c4f92ef12513bfef3422318b77
Allow PPC B and BLR to be if-converted into some predicated forms

This enables us to form predicated branches (which are the same conditional
branches we had before) and also a larger set of predicated returns (including
instructions like bdnzlr which is a conditional return and loop-counter
decrement all in one).

At the moment, if conversion does not capture all possible opportunities. A
simple example is provided in early-ret2.ll, where if conversion forms one
predicated return, and then the PPCEarlyReturn pass picks up the other one. So,
at least for now, we'll keep both mechanisms.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179134 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/PowerPC/PPCInstr64Bit.td
lib/Target/PowerPC/PPCInstrInfo.cpp
lib/Target/PowerPC/PPCInstrInfo.h
lib/Target/PowerPC/PPCInstrInfo.td
lib/Target/PowerPC/PPCTargetMachine.cpp
test/CodeGen/PowerPC/bdzlr.ll [new file with mode: 0644]
test/CodeGen/PowerPC/early-ret2.ll [new file with mode: 0644]