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(parent: 426db65) | patch
Remove the G8RC_NOX0_and_GPRC_NOR0 PPC register class
authorHal Finkel <hfinkel@anl.gov>
Thu, 21 Mar 2013 23:45:03 +0000 (23:45 +0000)
committerHal Finkel <hfinkel@anl.gov>
Thu, 21 Mar 2013 23:45:03 +0000 (23:45 +0000)
commit7697370adff8983e2a3de493362f0d8c9f9b0e17
tree9879b047b1a9929ffc9b7fdef76b9389276c0791tree | snapshot
parent426db657da8753921f21c676b91c527e1b77878ccommit | diff
Remove the G8RC_NOX0_and_GPRC_NOR0 PPC register class

As Jakob pointed out in his review of r177423, having a shared ZERO
register between the 32- and 64-bit register classes causes this
odd G8RC_NOX0_and_GPRC_NOR0 class to be created. As recommended,
this adds a ZERO8 register which differentiates the 32- and 64-bit
zeros.

No functionality change intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177683 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/PowerPC/PPCISelLowering.cpp diff | blob | history
lib/Target/PowerPC/PPCRegisterInfo.cpp diff | blob | history
lib/Target/PowerPC/PPCRegisterInfo.td diff | blob | history
C/C++ LLVM-based compilers that forbids OOTA behaviors