[SPARC] Revamp AnalyzeBranch and add ReverseBranchCondition.
authorJames Y Knight <jyknight@google.com>
Wed, 13 Jan 2016 04:44:14 +0000 (04:44 +0000)
committerJames Y Knight <jyknight@google.com>
Wed, 13 Jan 2016 04:44:14 +0000 (04:44 +0000)
commit732b4fd71a24d3cc2845413469bc937865e7595d
tree85f2a03e26b5b8e919f969bd2a94059fc2caf2db
parent561f3680a12638e8290ff3473bec4f0e9cb18bac
[SPARC] Revamp AnalyzeBranch and add ReverseBranchCondition.

AnalyzeBranch on X86 (and, previously, SPARC, which implementation was
copied from X86) tries to modify the branches based on block
layout (e.g. checking isLayoutSuccessor), when AllowModify is true.

The rest of the architectures leave that up to the caller, which can
call InsertBranch, RemoveBranch, and ReverseBranchCondition as
appropriate. That appears to be the preferred way to do it nowadays.

This commit makes SPARC like the rest: replaces AnalyzeBranch with an
implementation cribbed from AArch64, and adds a ReverseBranchCondition
implementation.

Additionally, a test-case has been added (also cribbed from AArch64)
demonstrating that redundant branch sequences no longer get emitted.

E.g., it used to emit code like this:
         bne .LBB1_2
         nop
         ba .LBB1_1
         nop
 .LBB1_2:

And now emits:
        cmp %i0, 42
        be .LBB1_1
        nop

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@257572 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/Sparc/SparcInstrInfo.cpp
lib/Target/Sparc/SparcInstrInfo.h
test/CodeGen/SPARC/2011-01-19-DelaySlot.ll
test/CodeGen/SPARC/analyze-branch.ll [new file with mode: 0644]