[mips] Marked up instructions added in MIPS-III and tested that IAS for -mcpu=mips...
authorDaniel Sanders <daniel.sanders@imgtec.com>
Fri, 9 May 2014 13:02:27 +0000 (13:02 +0000)
committerDaniel Sanders <daniel.sanders@imgtec.com>
Fri, 9 May 2014 13:02:27 +0000 (13:02 +0000)
commit70f6f7ee3ee9f80612b5f289c6b3f6ab713eeb95
treee81e1398b6c3988f03f80f49c324dcbd4694c5b0
parenta1e2e91de47be2f2d8f1a2a0074b4c8ca3f7994f
[mips] Marked up instructions added in MIPS-III and tested that IAS for -mcpu=mips[12] does not accept them

Summary:
This required a new instruction group representing the 32-bit subset of
MIPS-III that was available in MIPS32

A small number of instructions are correctly rejected but with the wrong error
message. These have been placed in a separate test for now.

There's some obvious InstAlias's that ought to be marked MIPS-III but arent.
This is because they are not currently tested. I intend to catch these with
a final pass through the tablegen records to find tablegen records without
ISA annotations.

Depends on D3674

Reviewers: vmedic

Reviewed By: vmedic

Differential Revision: http://reviews.llvm.org/D3675

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208408 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/Mips/Mips.td
lib/Target/Mips/Mips64InstrInfo.td
lib/Target/Mips/MipsInstrFPU.td
lib/Target/Mips/MipsInstrInfo.td
lib/Target/Mips/MipsSubtarget.cpp
lib/Target/Mips/MipsSubtarget.h
test/MC/Mips/mips1/invalid-mips3-wrong-error.s [new file with mode: 0644]
test/MC/Mips/mips1/invalid-mips3.s [new file with mode: 0644]
test/MC/Mips/mips2/invalid-mips3-wrong-error.s [new file with mode: 0644]
test/MC/Mips/mips2/invalid-mips3.s [new file with mode: 0644]