ARM64: implement cunning optimisation from AArch64
authorTim Northover <tnorthover@apple.com>
Fri, 18 Apr 2014 09:31:20 +0000 (09:31 +0000)
committerTim Northover <tnorthover@apple.com>
Fri, 18 Apr 2014 09:31:20 +0000 (09:31 +0000)
commit70b63374f24a8e05389bb410372d6b83230df227
tree5c3c55a96e9cce22e9c3aabd4292e76b3515f377
parente7ec66e56be056243e87c2920e0866d7aa84f6ff
ARM64: implement cunning optimisation from AArch64

A vector extract followed by a dup can become a single instruction even if the
types don't match. AArch64 handled this in ISelLowering, but a few reasonably
simple patterns can take care of it in TableGen, so that's where I've put it.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206573 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/ARM64/ARM64InstrInfo.td
test/CodeGen/ARM64/dup.ll