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(parent: 24f554f) | patch
[PowerPC] Add global named register support
authorHal Finkel <hfinkel@anl.gov>
Sun, 11 May 2014 19:29:11 +0000 (19:29 +0000)
committerHal Finkel <hfinkel@anl.gov>
Sun, 11 May 2014 19:29:11 +0000 (19:29 +0000)
commit70a83b490ea9e2e9c5ae4991a8c71248467974c8
treefd1b86d25cf4b3a6f29d80b7943f4048ae56b5c7tree | snapshot
parent24f554f05277413fd8ec77f80c3241d0298ab57fcommit | diff
[PowerPC] Add global named register support

Support for the intrinsics that read from and write to global named registers
is added for r1, r2 and r13 (depending on the subtarget).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208509 91177308-0d34-0410-b5e6-96231b3b80d8
docs/LangRef.rst diff | blob | history
lib/Target/PowerPC/PPCISelLowering.cpp diff | blob | history
lib/Target/PowerPC/PPCISelLowering.h diff | blob | history
test/CodeGen/PowerPC/named-reg-alloc-r0.ll [new file with mode: 0644] blob
test/CodeGen/PowerPC/named-reg-alloc-r1-64.ll [new file with mode: 0644] blob
test/CodeGen/PowerPC/named-reg-alloc-r1.ll [new file with mode: 0644] blob
test/CodeGen/PowerPC/named-reg-alloc-r13-64.ll [new file with mode: 0644] blob
test/CodeGen/PowerPC/named-reg-alloc-r13.ll [new file with mode: 0644] blob
test/CodeGen/PowerPC/named-reg-alloc-r2-64.ll [new file with mode: 0644] blob
test/CodeGen/PowerPC/named-reg-alloc-r2.ll [new file with mode: 0644] blob
C/C++ LLVM-based compilers that forbids OOTA behaviors