[FastISel][AArch64] Add target-specific lowering for logical operations.
authorJuergen Ributzka <juergen@apple.com>
Thu, 4 Sep 2014 01:29:18 +0000 (01:29 +0000)
committerJuergen Ributzka <juergen@apple.com>
Thu, 4 Sep 2014 01:29:18 +0000 (01:29 +0000)
commit68a4ab08b3063ffbb576b7010ae26a325c4565e9
tree33d769075c10102778bd80b1613c019ece58315d
parentfa2dfaedf2015df7c8a9426febf59c374491eb42
[FastISel][AArch64] Add target-specific lowering for logical operations.

This change adds support for immediate and shift-left folding into logical
operations.

This fixes rdar://problem/18223183.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@217118 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/AArch64/AArch64FastISel.cpp
test/CodeGen/AArch64/arm64-fast-isel-br.ll
test/CodeGen/AArch64/arm64-fast-isel-gv.ll
test/CodeGen/AArch64/fast-isel-logic-op.ll [new file with mode: 0644]