[ARM] Re-re-apply VLD1/VST1 base-update combine.
authorAhmed Bougacha <ahmed.bougacha@gmail.com>
Thu, 19 Feb 2015 23:52:41 +0000 (23:52 +0000)
committerAhmed Bougacha <ahmed.bougacha@gmail.com>
Thu, 19 Feb 2015 23:52:41 +0000 (23:52 +0000)
commit5898fc70ec47e850108a0aa25f3b49752266ef8a
treee3ea4a31485fd87dae75357fc5a5b04cceb23de5
parent19f93ebf180d7a547d5138a261becc275b4fbc83
[ARM] Re-re-apply VLD1/VST1 base-update combine.

This re-applies r223862, r224198, r224203, and r224754, which were
reverted in r228129 because they exposed Clang misalignment problems
when self-hosting.

The combine caused the crashes because we turned ISD::LOAD/STORE nodes
to ARMISD::VLD1/VST1_UPD nodes.  When selecting addressing modes, we
were very lax for the former, and only emitted the alignment operand
(as in "[r1:128]") when it was larger than the standard alignment of
the memory type.

However, for ARMISD nodes, we just used the MMO alignment, no matter
what.  In our case, we turned ISD nodes to ARMISD nodes, and this
caused the alignment operands to start being emitted.

And that's how we exposed alignment problems that were ignored before
(but I believe would have been caught with SCTRL.A==1?).

To fix this, we can just mirror the hack done for ISD nodes:  only
take into account the MMO alignment when the access is overaligned.

Original commit message:
We used to only combine intrinsics, and turn them into VLD1_UPD/VST1_UPD
when the base pointer is incremented after the load/store.

We can do the same thing for generic load/stores.

Note that we can only combine the first load/store+adds pair in
a sequence (as might be generated for a v16f32 load for instance),
because other combines turn the base pointer addition chain (each
computing the address of the next load, from the address of the last
load) into independent additions (common base pointer + this load's
offset).

rdar://19717869, rdar://14062261.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@229932 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/ARM/ARMISelDAGToDAG.cpp
lib/Target/ARM/ARMISelLowering.cpp
test/CodeGen/ARM/alloc-no-stack-realign.ll
test/CodeGen/ARM/memcpy-inline.ll
test/CodeGen/ARM/vector-load.ll [new file with mode: 0644]
test/CodeGen/ARM/vector-store.ll [new file with mode: 0644]
test/Transforms/LoopStrengthReduce/ARM/ivchain-ARM.ll