Rewrite pre-increment store patterns to use standard memory operands.
authorUlrich Weigand <ulrich.weigand@de.ibm.com>
Tue, 19 Mar 2013 19:52:04 +0000 (19:52 +0000)
committerUlrich Weigand <ulrich.weigand@de.ibm.com>
Tue, 19 Mar 2013 19:52:04 +0000 (19:52 +0000)
commit5882e3d82831710a7ea1fe8de4813350d4eecf05
tree7f60f5158ec2ad7b5e6ed8e76bc784b122e6ab5f
parentec8d1a5b72b1cb2d230ba52b25a017231393b182
Rewrite pre-increment store patterns to use standard memory operands.

Currently, pre-increment store patterns are written to use two separate
operands to represent address base and displacement:

  stwu $rS, $ptroff($ptrreg)

This causes problems when implementing the assembler parser, so this
commit changes the patterns to use standard (complex) memory operands
like in all other memory access instruction patterns:

  stwu $rS, $dst

To still match those instructions against the appropriate pre_store
SelectionDAG nodes, the patch uses the new feature that allows a Pat
to match multiple DAG operands against a single (complex) instruction
operand.

Approved by Hal Finkel.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@177429 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/PowerPC/PPCInstr64Bit.td
lib/Target/PowerPC/PPCInstrInfo.td
test/CodeGen/PowerPC/store-update.ll [new file with mode: 0644]