Allow explicit %reg0 operands beyond what the .td file describes.
authorJakob Stoklund Olesen <stoklund@2pi.dk>
Tue, 22 Dec 2009 21:48:20 +0000 (21:48 +0000)
committerJakob Stoklund Olesen <stoklund@2pi.dk>
Tue, 22 Dec 2009 21:48:20 +0000 (21:48 +0000)
commit5711564b091c39188775aee2768ad36a9b9a99b2
tree337d113f4dac5f2559250c695bba4c93a80ba6d6
parent3ea58b6d7a6357018f4f78396b457f86198a7afa
Allow explicit %reg0 operands beyond what the .td file describes.

ARM uses these to indicate predicates.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91922 91177308-0d34-0410-b5e6-96231b3b80d8
lib/CodeGen/MachineVerifier.cpp