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(parent: 6bcdb5b) | patch
Add SARX/SHRX/SHLX code generation support
authorMichael Liao <michael.liao@intel.com>
Wed, 26 Sep 2012 08:26:25 +0000 (08:26 +0000)
committerMichael Liao <michael.liao@intel.com>
Wed, 26 Sep 2012 08:26:25 +0000 (08:26 +0000)
commit4fa2ddbb94bb7b7f67e4f4d0aac292998fbf00ed
tree02f208c5c9f1e8d1620137e6ea020395e7006348tree | snapshot
parent6bcdb5b9034a02901175e94e89b4815f28f2f141commit | diff
Add SARX/SHRX/SHLX code generation support

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@164675 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/X86/X86InstrInfo.cpp diff | blob | history
lib/Target/X86/X86InstrShiftRotate.td diff | blob | history
test/CodeGen/X86/phys_subreg_coalesce-3.ll diff | blob | history
test/CodeGen/X86/shift-bmi2.ll [new file with mode: 0644] blob
test/CodeGen/X86/targetLoweringGeneric.ll diff | blob | history
C/C++ LLVM-based compilers that forbids OOTA behaviors