ARM IAS: support implicit immediate 0s for {LD,ST}R{B,}T
authorSaleem Abdulrasool <compnerd@compnerd.org>
Fri, 10 Jan 2014 04:38:31 +0000 (04:38 +0000)
committerSaleem Abdulrasool <compnerd@compnerd.org>
Fri, 10 Jan 2014 04:38:31 +0000 (04:38 +0000)
commit4eeee88e912cc03208b5ead91563a7519ec4ab73
tree25c464b871dfbdec9670639d8b4eed979568c4ab
parentd0a796e5dd03b23d48e085ed37dbe6579e1c58cd
ARM IAS: support implicit immediate 0s for {LD,ST}R{B,}T

The ARM ARM indicates the mnemonics as follows:

  ldrbt{<c>}{<q>} <Rt>, [<Rn>], {, #+/-<imm>}
  ldrt{<c>}{<q>} <Rt>, [<Rn>] {, #+/-<imm>}
  strbt{<c>}{<q>} <Rt>, [<Rn>] {, #<imm>}
  strt{<c>}{<q>} <Rt>, [<Rn>] {, #+/-<imm>}

This improves the parser to deal with the implicit immediate 0 for the mnemonics
as per the specification.

Thanks to Joerg Sonnenberger for the tests!

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@198914 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/ARM/ARMInstrInfo.td
test/MC/ARM/arm_addrmode2.s