This patch implements atomic intrinsics atomic.load.add (sub,and,or,xor,
authorBruno Cardoso Lopes <bruno.cardoso@gmail.com>
Tue, 31 May 2011 02:54:07 +0000 (02:54 +0000)
committerBruno Cardoso Lopes <bruno.cardoso@gmail.com>
Tue, 31 May 2011 02:54:07 +0000 (02:54 +0000)
commit4e694c96f1c0c2d09a287ff69bab5896e04dd3fd
tree392a96b7c42b2f22487f02c32905b92efb4c51b7
parentd979686bb47f2dcdca60f0a088f59d1964346453
This patch implements atomic intrinsics atomic.load.add (sub,and,or,xor,
nand), atomic.swap and atomic.cmp.swap, all in i8, i16 and i32 versions.
The intrinsics are implemented by creating pseudo-instructions, which are
then expanded in the method MipsTargetLowering::EmitInstrWithCustomInserter.

Patch by Sasa Stankovic.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132323 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/Mips/MipsISelLowering.cpp
lib/Target/Mips/MipsISelLowering.h
lib/Target/Mips/MipsInstrInfo.td
lib/Target/Mips/MipsMachineFunction.h
test/CodeGen/Mips/atomic.ll [new file with mode: 0644]