[InstSimplify] sgt on i1s also encodes implication
authorPhilip Reames <listmail@philipreames.com>
Thu, 29 Oct 2015 03:19:10 +0000 (03:19 +0000)
committerPhilip Reames <listmail@philipreames.com>
Thu, 29 Oct 2015 03:19:10 +0000 (03:19 +0000)
commit49a006cd8d692cd50ba36fa52aa0df073d9bdf58
tree206911b7dd8c0fbb2b25a67bdff85e8dc6120fa2
parentc9f72585e869e84099f8b5c58ddb2977931234c2
[InstSimplify] sgt on i1s also encodes implication

Follow on to http://reviews.llvm.org/D13074, implementing something pointed out by Sanjoy. His truth table from his comment on that bug summarizes things well:
LHS | RHS | LHS >=s RHS | LHS implies RHS
0 | 0 | 1 (0 >= 0) | 1
0 | 1 | 1 (0 >= -1) | 1
1 | 0 | 0 (-1 >= 0) | 0
1 | 1 | 1 (-1 >= -1) | 1

The key point is that an "i1 1" is the value "-1", not "1".

Differential Revision: http://reviews.llvm.org/D13756

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@251597 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Analysis/InstructionSimplify.cpp
test/Transforms/InstSimplify/implies.ll