Fix x86 inline ams 'q' constraint support. In 32-bit mode, it's just like 'Q', i...
authorEvan Cheng <evan.cheng@apple.com>
Fri, 17 Jul 2009 22:13:25 +0000 (22:13 +0000)
committerEvan Cheng <evan.cheng@apple.com>
Fri, 17 Jul 2009 22:13:25 +0000 (22:13 +0000)
commit47e9fab1584a3fc9311fdecdbb87124e0a0b39e8
tree48fad3fb8c68e73a61589eeb520e3c0ca6324d46
parent12c67fbf2a49145f332a12fbb32441310d322088
Fix x86 inline ams 'q' constraint support. In 32-bit mode, it's just like 'Q', i.e. EAX, EDX, ECX, EBX. In 64-bit mode, it just means all the i64r registers. Yeah, that makes sense.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@76248 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/X86/X86ISelLowering.cpp
test/CodeGen/X86/inline-asm-q-regs.ll [new file with mode: 0644]