[AArch64] Promote loads from stored
authorJun Bum Lim <junbuml@codeaurora.org>
Tue, 22 Dec 2015 16:36:16 +0000 (16:36 +0000)
committerJun Bum Lim <junbuml@codeaurora.org>
Tue, 22 Dec 2015 16:36:16 +0000 (16:36 +0000)
commit3ff9f0996f1ffccd3d938bf4cb8c740f532150a7
tree34fa31b0f43c44fba09699ee0b90dfe715bfc61a
parentccbb5bd301c6ad1756ce7eb6dba60e6238e61142
[AArch64] Promote loads from stored

This is a recommit of r256004 which was reverted in r256160. The issue was the
incorrect promotion for half and byte loads transformed into mov instructions.
This fix will replace half and byte type loads only with bit field extracts.

Original commit message:

This change promotes load instructions which directly read from stored by
replacing them with mov instructions. If the store is wider than the load,
the load will be replaced with a bitfield extract.
For example :
  STRWui %W1, %X0, 1
  %W0 = LDRHHui %X0, 3
becomes
  STRWui %W1, %X0, 1
  %W0 = UBFMWri %W1, 16, 31

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@256249 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/AArch64/AArch64LoadStoreOptimizer.cpp
test/CodeGen/AArch64/arm64-alloca-frame-pointer-offset.ll
test/CodeGen/AArch64/arm64-ld-from-st.ll [new file with mode: 0644]
test/CodeGen/AArch64/regress-tblgen-chains.ll