The previous code could potentially cause a cycle. Allow ordering w.r.t. a 0 order.
authorBill Wendling <isanbard@gmail.com>
Wed, 6 Jan 2010 00:23:35 +0000 (00:23 +0000)
committerBill Wendling <isanbard@gmail.com>
Wed, 6 Jan 2010 00:23:35 +0000 (00:23 +0000)
commit3f09487404bc46297dc6fd91ca3ac478c3a7fa34
tree8bd7bd42effd493d74c1835fc8078613ce328716
parentcfeea4b92aa5be102e58efea947ca40a95b0c999
The previous code could potentially cause a cycle. Allow ordering w.r.t. a 0 order.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@92810 91177308-0d34-0410-b5e6-96231b3b80d8
lib/CodeGen/SelectionDAG/ScheduleDAGRRList.cpp