[mips][msa] Made the operand register sets optional for the VEC formats
authorDaniel Sanders <daniel.sanders@imgtec.com>
Fri, 6 Sep 2013 13:01:47 +0000 (13:01 +0000)
committerDaniel Sanders <daniel.sanders@imgtec.com>
Fri, 6 Sep 2013 13:01:47 +0000 (13:01 +0000)
commit3aaa3e31aa35164fa54474bcf3a2c2df5ab8b375
tree4ad38bd1b8af3b1c28507878550b6deb828057fa
parentdadd1fba3280295936f556acbdc3fbb68b496bad
[mips][msa] Made the operand register sets optional for the VEC formats

Their default is to be the same as the result register set.

No functional change

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@190153 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/Mips/MipsMSAInstrInfo.td