[PowerPC] VSX instruction latency corrections
authorHal Finkel <hfinkel@anl.gov>
Sat, 29 Mar 2014 13:20:31 +0000 (13:20 +0000)
committerHal Finkel <hfinkel@anl.gov>
Sat, 29 Mar 2014 13:20:31 +0000 (13:20 +0000)
commit3873f8265ba2b7b996bbd286166318cbf22b27eb
treed3d975cec7b9961fb215ce682ca4f859335b7f77
parent3fed2f133ce05fb7ae7079ecdf979f8e3b2fb210
[PowerPC] VSX instruction latency corrections

The vector divide and sqrt instructions have high latencies, and the scalar
comparisons are like all of the others. On the P7, permutations take an extra
cycle over purely-simple vector ops.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205096 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/PowerPC/PPCInstrVSX.td
lib/Target/PowerPC/PPCScheduleP7.td