Fix a regression I recently introduced by removing DwarfRegNum of
authorRafael Espindola <rafael.espindola@gmail.com>
Fri, 27 May 2011 22:15:01 +0000 (22:15 +0000)
committerRafael Espindola <rafael.espindola@gmail.com>
Fri, 27 May 2011 22:15:01 +0000 (22:15 +0000)
commit37afca128db40b086752f3f62464ba08128c3b4d
treececef5af30bfed8e0ff78f2c6d46e6888072928f
parent5b23b7fe3150b2050d6fcd6981d64f30930fd3ef
Fix a regression I recently introduced by removing DwarfRegNum of
subregisters:

When a value is in a subregister, at least report the location as being
the superregister. We should extend the .td files to encode the bit
range so that we can produce a DW_OP_bit_piece.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@132224 91177308-0d34-0410-b5e6-96231b3b80d8
lib/CodeGen/AsmPrinter/AsmPrinter.cpp
test/DebugInfo/X86/subreg.ll [new file with mode: 0644]