Let each target decide byval alignment. For X86, it's 4-byte unless the aggregare...
authorEvan Cheng <evan.cheng@apple.com>
Wed, 23 Jan 2008 23:17:41 +0000 (23:17 +0000)
committerEvan Cheng <evan.cheng@apple.com>
Wed, 23 Jan 2008 23:17:41 +0000 (23:17 +0000)
commit29286502628867b31872ead2f2527592480f0970
treeef8b23bf5acebabc33fea3c8928a9f83b85ddeae
parentf02e26abc04c95be6be02b614ea68616ed5c0927
Let each target decide byval alignment. For X86, it's 4-byte unless the aggregare contains SSE vector(s). For x86-64, it's max of 8 or alignment of the type.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@46286 91177308-0d34-0410-b5e6-96231b3b80d8
include/llvm/Target/TargetLowering.h
lib/Target/X86/X86ISelLowering.cpp
lib/Target/X86/X86ISelLowering.h
test/CodeGen/X86/byval4.ll
test/CodeGen/X86/byval5.ll
test/CodeGen/X86/byval6.ll [new file with mode: 0644]
test/CodeGen/X86/byval7.ll [new file with mode: 0644]