AMDGPU: Fix sched model for VOP2b instructions
authorMatt Arsenault <Matthew.Arsenault@amd.com>
Sat, 26 Sep 2015 02:25:45 +0000 (02:25 +0000)
committerMatt Arsenault <Matthew.Arsenault@amd.com>
Sat, 26 Sep 2015 02:25:45 +0000 (02:25 +0000)
commit23663b84b909af8bf69c44d6678f151dc0599439
tree05e28424f57eecc750209b2c379e5366a0f9a2ba
parent24b507c2c169ec792ec1c08c488ac61b8d5f14b4
AMDGPU: Fix sched model for VOP2b instructions

Trying to use the version with the explicit output operand
would complain because of the missing WriteSALU. I'm not sure
why it doesn't complain about this with the implicit VCC def.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@248646 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/AMDGPU/SIInstrInfo.td
test/CodeGen/AMDGPU/si-triv-disjoint-mem-access.ll