[PPC] Implement vmrgew and vmrgow instructions
authorKit Barton <kbarton@ca.ibm.com>
Thu, 25 Jun 2015 15:17:40 +0000 (15:17 +0000)
committerKit Barton <kbarton@ca.ibm.com>
Thu, 25 Jun 2015 15:17:40 +0000 (15:17 +0000)
commit1ebbc687195bd339d1246590bbfee29b4d5447a4
treefd2f75dd7fd03a0886d25c0cf4d04b9464697615
parent39b2e22f004ab206c85c6ac89c30282659c18709
[PPC] Implement vmrgew and vmrgow instructions

This patch adds support for the vector merge even word and vector merge odd word
instructions introduced in POWER8.

Phabricator review: http://reviews.llvm.org/D10704

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@240650 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/PowerPC/PPCISelLowering.cpp
lib/Target/PowerPC/PPCISelLowering.h
lib/Target/PowerPC/PPCInstrAltivec.td
test/CodeGen/PowerPC/vec_mergeow.ll [new file with mode: 0644]
test/MC/Disassembler/PowerPC/ppc64-encoding-vmx.txt
test/MC/PowerPC/ppc64-encoding-vmx.s