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(parent: b57c2dc) | patch
[mips][microMIPS] Implement CACHEE and PREFE instructions for microMIPS32r6
authorZoran Jovanovic <zoran.jovanovic@imgtec.com>
Tue, 15 Sep 2015 10:05:10 +0000 (10:05 +0000)
committerZoran Jovanovic <zoran.jovanovic@imgtec.com>
Tue, 15 Sep 2015 10:05:10 +0000 (10:05 +0000)
commit1b6640a5fcb474cc50ae52b5e5099f1ee83103a9
treeb314b1a28f7248e99a43481a1f980052efd50f8ctree | snapshot
parentb57c2dc74617ba8255bed770f44d53415c3bf32ccommit | diff
[mips][microMIPS] Implement CACHEE and PREFE instructions for microMIPS32r6
Differential Revision: http://reviews.llvm.org/D11632

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@247670 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/Mips/MCTargetDesc/MipsMCCodeEmitter.cpp diff | blob | history
lib/Target/Mips/MicroMips32r6InstrFormats.td diff | blob | history
lib/Target/Mips/MicroMips32r6InstrInfo.td diff | blob | history
test/MC/Disassembler/Mips/micromips32r6.txt diff | blob | history
test/MC/Mips/micromips32r6/valid.s diff | blob | history
C/C++ LLVM-based compilers that forbids OOTA behaviors