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(parent: f905f69) | patch
Add intrinsics, code gen, assembler and disassembler support for the SSE4a extrq...
authorBenjamin Kramer <benny.kra@googlemail.com>
Tue, 29 May 2012 19:05:25 +0000 (19:05 +0000)
committerBenjamin Kramer <benny.kra@googlemail.com>
Tue, 29 May 2012 19:05:25 +0000 (19:05 +0000)
commit1386e9b7b16a8138ae7060c2dbb8b029f7c4fce2
tree0dc708a9e42dfe69a02c67071d3f64ab6a12aa21tree | snapshot
parentf905f69668e5dd184c0a2b5fae38d9f3721c0d3bcommit | diff
Add intrinsics, code gen, assembler and disassembler support for the SSE4a extrq and insertq instructions.

This required light surgery on the assembler and disassembler
because the instructions use an uncommon encoding. They are
the only two instructions in x86 that use register operands
and two immediates.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@157634 91177308-0d34-0410-b5e6-96231b3b80d8
include/llvm/IntrinsicsX86.td diff | blob | history
lib/Target/X86/MCTargetDesc/X86MCCodeEmitter.cpp diff | blob | history
lib/Target/X86/X86InstrSSE.td diff | blob | history
test/CodeGen/X86/sse4a.ll diff | blob | history
test/MC/Disassembler/X86/x86-32.txt diff | blob | history
test/MC/Disassembler/X86/x86-64.txt diff | blob | history
test/MC/X86/x86_64-sse4a.s [new file with mode: 0644] blob
utils/TableGen/X86RecognizableInstr.cpp diff | blob | history
C/C++ LLVM-based compilers that forbids OOTA behaviors