[PowerPC] Support all condition register logical instructions
authorUlrich Weigand <ulrich.weigand@de.ibm.com>
Mon, 1 Jul 2013 21:40:54 +0000 (21:40 +0000)
committerUlrich Weigand <ulrich.weigand@de.ibm.com>
Mon, 1 Jul 2013 21:40:54 +0000 (21:40 +0000)
commit1307d8300f6fe97059998480c42b44faefbc9b99
treeaa96625b4ffc7739df065a5b144ffc610c1a7d2b
parentbde84a96ea67737e275d2adee2da86a0fa875785
[PowerPC] Support all condition register logical instructions

This adds support for all missing condition register logical
instructions and extended mnemonics to the asm parser.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@185387 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/PowerPC/PPCInstrInfo.td
test/MC/PowerPC/ppc64-encoding-ext.s
test/MC/PowerPC/ppc64-encoding.s