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(parent: b3cb707) | patch
[AArch64] Add register constraints to avoid generating STLXR and STXR with unpredicta...
authorKevin Qin <Kevin.Qin@arm.com>
Fri, 21 Feb 2014 07:45:48 +0000 (07:45 +0000)
committerKevin Qin <Kevin.Qin@arm.com>
Fri, 21 Feb 2014 07:45:48 +0000 (07:45 +0000)
commit10ecde5c3442cd24c8f13bd29c20a2c48be1bad8
treeb3e9b87e8ecd928e55ca698a15479d9fbd3802a7tree | snapshot
parentb3cb707f935560e40e2c1b15922910e6246cccf5commit | diff
[AArch64] Add register constraints to avoid generating STLXR and STXR with unpredictable behavior.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@201841 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/AArch64/AArch64InstrInfo.td diff | blob | history
test/CodeGen/AArch64/atomic-ops.ll diff | blob | history
C/C++ LLVM-based compilers that forbids OOTA behaviors