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(parent: be4c844) | patch
Make X86::FsFLD0SS / FsFLD0SD real pseudo-instructions.
authorJakob Stoklund Olesen <stoklund@2pi.dk>
Tue, 29 Nov 2011 22:27:25 +0000 (22:27 +0000)
committerJakob Stoklund Olesen <stoklund@2pi.dk>
Tue, 29 Nov 2011 22:27:25 +0000 (22:27 +0000)
commit0edd83bfff5b29a6d08718a0abc13aa7197c372d
tree69e32cd52f47874f228f455fe57e378da5a1822atree | snapshot
parentbe4c84464892ea0a4bf51773502f2b0a086fe184commit | diff
Make X86::FsFLD0SS / FsFLD0SD real pseudo-instructions.

Like V_SET0, these instructions are expanded by ExpandPostRA to xorps /
vxorps so they can participate in execution domain swizzling.

This also makes the AVX variants redundant.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@145440 91177308-0d34-0410-b5e6-96231b3b80d8
12 files changed:
lib/Target/X86/X86FastISel.cpp diff | blob | history
lib/Target/X86/X86InstrInfo.cpp diff | blob | history
lib/Target/X86/X86InstrInfo.td diff | blob | history
lib/Target/X86/X86InstrSSE.td diff | blob | history
lib/Target/X86/X86MCInstLower.cpp diff | blob | history
test/CodeGen/X86/2008-08-25-AsmRegTypeMismatch.ll diff | blob | history
test/CodeGen/X86/bc-extract.ll diff | blob | history
test/CodeGen/X86/fast-isel-x86-64.ll diff | blob | history
test/CodeGen/X86/peep-vector-extract-insert.ll diff | blob | history
test/CodeGen/X86/sse-domains.ll diff | blob | history
test/CodeGen/X86/sse-minmax.ll diff | blob | history
test/CodeGen/X86/zero-remat.ll diff | blob | history
C/C++ LLVM-based compilers that forbids OOTA behaviors