Start replacing vector_extract/vector_insert with extractelt/insertelt
authorMatt Arsenault <Matthew.Arsenault@amd.com>
Fri, 11 Dec 2015 19:20:16 +0000 (19:20 +0000)
committerMatt Arsenault <Matthew.Arsenault@amd.com>
Fri, 11 Dec 2015 19:20:16 +0000 (19:20 +0000)
commit0e0cc9459a89ac4f5e4cb5003d223a974c2d4d94
tree54077c0af9fab76eb68fa475331e8d86d5c9d35e
parent4f331ff0d30a81ae5c41ad5a35964398996930a1
Start replacing vector_extract/vector_insert with extractelt/insertelt

These are redundant pairs of nodes defined for
INSERT_VECTOR_ELEMENT/EXTRACT_VECTOR_ELEMENT.
insertelement/extractelement are slightly closer to the corresponding
C++ node name, and has stricter type checking so prefer it.

Update targets to only use these nodes where it is trivial to do so.
AArch64, ARM, and Mips all have various type errors on simple replacement,
so they will need work to fix.

Example from AArch64:

def : Pat<(sext_inreg (vector_extract (v16i8 V128:$Rn), VectorIndexB:$idx), i8),
          (i32 (SMOVvi8to32 V128:$Rn, VectorIndexB:$idx))>;

Which is trying to do sext_inreg i8, i8.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@255359 91177308-0d34-0410-b5e6-96231b3b80d8
12 files changed:
include/llvm/Target/TargetSelectionDAG.td
lib/Target/AArch64/AArch64InstrInfo.td
lib/Target/AMDGPU/AMDGPUInstructions.td
lib/Target/AMDGPU/SIInstructions.td
lib/Target/NVPTX/NVPTXVector.td
lib/Target/PowerPC/PPCInstrQPX.td
lib/Target/PowerPC/PPCInstrVSX.td
lib/Target/Sparc/SparcInstrInfo.td
lib/Target/X86/X86InstrAVX512.td
lib/Target/X86/X86InstrFragmentsSIMD.td
lib/Target/X86/X86InstrMMX.td
lib/Target/X86/X86InstrSSE.td