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(parent: 8b580cc) | patch
ARM64: print correct aliases for NEON mov & mvn instructions
authorTim Northover <tnorthover@apple.com>
Thu, 15 May 2014 12:11:02 +0000 (12:11 +0000)
committerTim Northover <tnorthover@apple.com>
Thu, 15 May 2014 12:11:02 +0000 (12:11 +0000)
commit0a088b1fc5b98c303efdfe6103957b90c943b2e5
treeefa9cdfb68b8204bc18141ab5cb0ddf8ecc3f193tree | snapshot
parent8b580ccba027481bc4a9da4f374e2f1a60695372commit | diff
ARM64: print correct aliases for NEON mov & mvn instructions

In all cases, if a "mov" alias exists, it is the canonical form of the
instruction. Now that TableGen can support aliases containing syntax variants,
we can enable them and improve the quality of the asm output.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208874 91177308-0d34-0410-b5e6-96231b3b80d8
12 files changed:
lib/Target/ARM64/ARM64InstrFormats.td diff | blob | history
lib/Target/ARM64/ARM64InstrInfo.td diff | blob | history
test/CodeGen/AArch64/neon-bitwise-instructions.ll diff | blob | history
test/CodeGen/AArch64/neon-compare-instructions.ll diff | blob | history
test/CodeGen/ARM64/aarch64-neon-copy.ll diff | blob | history
test/CodeGen/ARM64/neon-compare-instructions.ll diff | blob | history
test/CodeGen/ARM64/umov.ll diff | blob | history
test/CodeGen/ARM64/vcmp.ll diff | blob | history
test/MC/AArch64/neon-simd-copy.s diff | blob | history
test/MC/AArch64/neon-simd-misc.s diff | blob | history
test/MC/ARM64/advsimd.s diff | blob | history
test/MC/Disassembler/ARM64/advsimd.txt diff | blob | history
C/C++ LLVM-based compilers that forbids OOTA behaviors