Completely eliminate def&use operands. Now a register operand is EITHER a
authorChris Lattner <sabre@nondot.org>
Tue, 5 Sep 2006 02:31:13 +0000 (02:31 +0000)
committerChris Lattner <sabre@nondot.org>
Tue, 5 Sep 2006 02:31:13 +0000 (02:31 +0000)
commit09e460662a8d7328da1b938d5581a6ef3740b51d
tree5977421635bccf078f4119fc797070fec9806dbe
parent2926869b4a083fc951484de03a9867eabf81e880
Completely eliminate def&use operands.  Now a register operand is EITHER a
def operand or a use operand.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@30109 91177308-0d34-0410-b5e6-96231b3b80d8
include/llvm/CodeGen/MachineInstr.h
include/llvm/CodeGen/MachineInstrBuilder.h
lib/CodeGen/SelectionDAG/ScheduleDAG.cpp
lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
lib/Target/ARM/ARMRegisterInfo.cpp
lib/Target/Alpha/AlphaRegisterInfo.cpp
lib/Target/IA64/IA64RegisterInfo.cpp
lib/Target/PowerPC/PPCRegisterInfo.cpp
lib/Target/Sparc/SparcRegisterInfo.cpp
lib/Target/X86/X86RegisterInfo.cpp