Add patterns for conditional branches with 64-bit register operands.
authorAkira Hatanaka <ahatanaka@mips.com>
Tue, 11 Oct 2011 19:09:09 +0000 (19:09 +0000)
committerAkira Hatanaka <ahatanaka@mips.com>
Tue, 11 Oct 2011 19:09:09 +0000 (19:09 +0000)
commit06f8231bfbdd77d68e7ec7ff2e238c45b3bec0b8
tree4388f7e0fe73d53439be8b0a99bb55d59f6b6637
parent8191f34797d2e3cfedf5cff3e79947c90599f720
Add patterns for conditional branches with 64-bit register operands.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@141696 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/Mips/Mips64InstrInfo.td
lib/Target/Mips/MipsInstrInfo.td