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(parent: a6fb1b6) | patch
Added support for new condition code modeling scheme (i.e. physical register dependen...
authorEvan Cheng <evan.cheng@apple.com>
Tue, 25 Sep 2007 01:57:46 +0000 (01:57 +0000)
committerEvan Cheng <evan.cheng@apple.com>
Tue, 25 Sep 2007 01:57:46 +0000 (01:57 +0000)
commit0488db9b99fcfca407e859ef5cccf40dea23de16
tree19d2a6124364f9e5bbc91ed3f9c26d44419ccb1ctree | snapshot
parenta6fb1b6743ee1411accf2d6e636f73f2ee0a7f5bcommit | diff
Added support for new condition code modeling scheme (i.e. physical register dependency). These are a bunch of instructions that are duplicated so the x86 backend can support both the old and new schemes at the same time. They will be deleted after
all the kinks are worked out.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@42285 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/X86/X86FloatingPoint.cpp diff | blob | history
lib/Target/X86/X86ISelLowering.cpp diff | blob | history
lib/Target/X86/X86ISelLowering.h diff | blob | history
lib/Target/X86/X86InstrFPStack.td diff | blob | history
lib/Target/X86/X86InstrInfo.cpp diff | blob | history
lib/Target/X86/X86InstrInfo.td diff | blob | history
lib/Target/X86/X86InstrSSE.td diff | blob | history
lib/Target/X86/X86InstrX86-64.td diff | blob | history
lib/Target/X86/X86RegisterInfo.cpp diff | blob | history
C/C++ LLVM-based compilers that forbids OOTA behaviors