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(parent: 12f06e1) | patch
Vector forms of SHL, SRA, and SRL can be constant folded using SimplifyVBinOp too
authorDaniel Sanders <daniel.sanders@imgtec.com>
Mon, 11 Nov 2013 17:23:41 +0000 (17:23 +0000)
committerDaniel Sanders <daniel.sanders@imgtec.com>
Mon, 11 Nov 2013 17:23:41 +0000 (17:23 +0000)
commit028e4d27b1afc62be0687e9c3b57992c36852938
tree3622a9691dfecf043d2aa73aecad098ebc7c0275tree | snapshot
parent12f06e1e0936b01bf329615ec4f0f5488c98c0ddcommit | diff
Vector forms of SHL, SRA, and SRL can be constant folded using SimplifyVBinOp too

Reviewers: dsanders

Reviewed By: dsanders

CC: llvm-commits, nadav
Differential Revision: http://llvm-reviews.chandlerc.com/D1958

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@194393 91177308-0d34-0410-b5e6-96231b3b80d8
lib/CodeGen/SelectionDAG/DAGCombiner.cpp diff | blob | history
test/CodeGen/Mips/msa/shift-dagcombine.ll [new file with mode: 0644] blob
C/C++ LLVM-based compilers that forbids OOTA behaviors