[cleanup] Lift using directives, DEBUG_TYPE definitions, and even some
authorChandler Carruth <chandlerc@gmail.com>
Tue, 22 Apr 2014 02:03:14 +0000 (02:03 +0000)
committerChandler Carruth <chandlerc@gmail.com>
Tue, 22 Apr 2014 02:03:14 +0000 (02:03 +0000)
commit58f58c97f0a4bbadb81a198c340f5264344d41e1
tree813f8a0169096055e0f9471ebc1079f2fc466eea
parent8677f2ff9acf317461987b439ede693f01baa5ec
[cleanup] Lift using directives, DEBUG_TYPE definitions, and even some
system headers above the includes of generated '.inc' files that
actually contain code. In a few targets this was already done pretty
consistently, but it wasn't done *really* consistently anywhere. It is
strictly cleaner IMO and necessary in a bunch of places where the
DEBUG_TYPE is referenced from the generated code. Consistency with the
necessary places trumps. Hopefully the build bots are OK with the
movement of intrin.h...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@206838 91177308-0d34-0410-b5e6-96231b3b80d8
48 files changed:
lib/Target/AArch64/AArch64InstrInfo.cpp
lib/Target/AArch64/AArch64RegisterInfo.cpp
lib/Target/AArch64/AArch64Subtarget.cpp
lib/Target/AArch64/MCTargetDesc/AArch64MCTargetDesc.cpp
lib/Target/ARM/ARMBaseInstrInfo.cpp
lib/Target/ARM/ARMSubtarget.cpp
lib/Target/ARM64/ARM64InstrInfo.cpp
lib/Target/ARM64/ARM64RegisterInfo.cpp
lib/Target/ARM64/ARM64Subtarget.cpp
lib/Target/ARM64/Disassembler/ARM64Disassembler.cpp
lib/Target/ARM64/MCTargetDesc/ARM64MCTargetDesc.cpp
lib/Target/Hexagon/HexagonInstrInfo.cpp
lib/Target/Hexagon/MCTargetDesc/HexagonMCTargetDesc.cpp
lib/Target/MSP430/MCTargetDesc/MSP430MCTargetDesc.cpp
lib/Target/MSP430/MSP430InstrInfo.cpp
lib/Target/MSP430/MSP430RegisterInfo.cpp
lib/Target/MSP430/MSP430Subtarget.cpp
lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.cpp
lib/Target/Mips/MipsInstrInfo.cpp
lib/Target/Mips/MipsRegisterInfo.cpp
lib/Target/Mips/MipsSubtarget.cpp
lib/Target/NVPTX/MCTargetDesc/NVPTXMCTargetDesc.cpp
lib/Target/NVPTX/NVPTXInstrInfo.cpp
lib/Target/NVPTX/NVPTXSubtarget.cpp
lib/Target/PowerPC/MCTargetDesc/PPCMCTargetDesc.cpp
lib/Target/PowerPC/PPCInstrInfo.cpp
lib/Target/PowerPC/PPCRegisterInfo.cpp
lib/Target/PowerPC/PPCSubtarget.cpp
lib/Target/R600/AMDGPUInstrInfo.cpp
lib/Target/R600/MCTargetDesc/AMDGPUMCTargetDesc.cpp
lib/Target/R600/R600InstrInfo.cpp
lib/Target/Sparc/MCTargetDesc/SparcMCTargetDesc.cpp
lib/Target/Sparc/SparcInstrInfo.cpp
lib/Target/Sparc/SparcRegisterInfo.cpp
lib/Target/Sparc/SparcSubtarget.cpp
lib/Target/SystemZ/MCTargetDesc/SystemZMCTargetDesc.cpp
lib/Target/SystemZ/SystemZInstrInfo.cpp
lib/Target/SystemZ/SystemZRegisterInfo.cpp
lib/Target/SystemZ/SystemZSubtarget.cpp
lib/Target/X86/Disassembler/X86Disassembler.cpp
lib/Target/X86/MCTargetDesc/X86MCTargetDesc.cpp
lib/Target/X86/X86InstrInfo.cpp
lib/Target/X86/X86RegisterInfo.cpp
lib/Target/X86/X86Subtarget.cpp
lib/Target/XCore/MCTargetDesc/XCoreMCTargetDesc.cpp
lib/Target/XCore/XCoreInstrInfo.cpp
lib/Target/XCore/XCoreRegisterInfo.cpp
lib/Target/XCore/XCoreSubtarget.cpp