X-Git-Url: http://plrg.eecs.uci.edu/git/?p=oota-llvm.git;a=blobdiff_plain;f=test%2FMC%2FARM%2Feh-directive-section-multiple-func.s;h=e7198a4aecbeac2dde56f44a0cd50abd5b9be6c5;hp=425cbd7d0158ba4157362ce121ea36ff885abec0;hb=05da50f87b4c922cc8f1b668d9311a741620c01a;hpb=e6da045ce17e2b259030f801642e1d0e370125ad diff --git a/test/MC/ARM/eh-directive-section-multiple-func.s b/test/MC/ARM/eh-directive-section-multiple-func.s index 425cbd7d015..e7198a4aecb 100644 --- a/test/MC/ARM/eh-directive-section-multiple-func.s +++ b/test/MC/ARM/eh-directive-section-multiple-func.s @@ -1,5 +1,7 @@ @ RUN: llvm-mc %s -triple=armv7-unknown-linux-gnueabi -filetype=obj -o - \ -@ RUN: | llvm-readobj -s -sd -sr -t | FileCheck %s +@ RUN: | llvm-readobj -s -sd -sr -t > %t +@ RUN: FileCheck %s < %t +@ RUN: FileCheck --check-prefix=RELOC %s < %t @ Check whether the section is switched back properly. @@ -70,13 +72,13 @@ func2: @ CHECK: ) @ CHECK: } -@ CHECK: Section { -@ CHECK: Name: .rel.ARM.extab.TEST1 -@ CHECK: Relocations [ -@ CHECK: 0x0 R_ARM_PREL31 __gxx_personality_v0 0x0 -@ CHECK: 0x8 R_ARM_PREL31 __gxx_personality_v0 0x0 -@ CHECK: ] -@ CHECK: } +@ RELOC: Section { +@ RELOC: Name: .rel.ARM.extab.TEST1 +@ RELOC: Relocations [ +@ RELOC: 0x0 R_ARM_PREL31 __gxx_personality_v0 0x0 +@ RELOC: 0x8 R_ARM_PREL31 __gxx_personality_v0 0x0 +@ RELOC: ] +@ RELOC: } @------------------------------------------------------------------------------- @@ -99,15 +101,15 @@ func2: @ .ARM.extab.TESET1 section. @------------------------------------------------------------------------------- -@ CHECK: Section { -@ CHECK: Name: .rel.ARM.exidx.TEST1 -@ CHECK: Relocations [ -@ CHECK: 0x0 R_ARM_PREL31 .TEST1 0x0 -@ CHECK: 0x4 R_ARM_PREL31 .ARM.extab.TEST1 0x0 -@ CHECK: 0x8 R_ARM_PREL31 .TEST1 0x0 -@ CHECK: 0xC R_ARM_PREL31 .ARM.extab.TEST1 0x0 -@ CHECK: ] -@ CHECK: } +@ RELOC: Section { +@ RELOC: Name: .rel.ARM.exidx.TEST1 +@ RELOC: Relocations [ +@ RELOC: 0x0 R_ARM_PREL31 .TEST1 0x0 +@ RELOC: 0x4 R_ARM_PREL31 .ARM.extab.TEST1 0x0 +@ RELOC: 0x8 R_ARM_PREL31 .TEST1 0x0 +@ RELOC: 0xC R_ARM_PREL31 .ARM.extab.TEST1 0x0 +@ RELOC: ] +@ RELOC: } @-------------------------------------------------------------------------------